Delay Lines

Integrated Circuits (ICs)/Clock/Timing/Delay Lines.Products in the clock delay line family are digital devices used to introduce a time delay into a digital signal, such that signal transitions presented to a device’s input are replicated at the output after some known period of time. They are often used in high-speed digital systems to correct or compensate for variations in signal propagation times between different signal paths. Devices are available to generate delays of fixed, selectable, or variable duration.